Reconfigurable Signal Processing and Hardware Architecture for Broadband Wireless Communications
نویسندگان
چکیده
This paper proposes a broadband wireless transceiver which can be reconfigured to any type of cyclic-prefix (CP) -based communication systems, including orthogonal frequency-division multiplexing (OFDM), single-carrier cyclic-prefix (SCCP) system, multicarrier (MC) code-division multiple access (MC-CDMA), MC direct-sequence CDMA (MC-DS-CDMA), CP-based CDMA (CP-CDMA), and CP-based direct-sequence CDMA (CP-DS-CDMA). A hardware platform is proposed and the reusable common blocks in such a transceiver are identified. The emphasis is on the equalizer design for mobile receivers. It is found that after block despreading operation, MC-DS-CDMA and CP-DS-CDMA have the same equalization blocks as OFDM and SCCP systems, respectively, therefore hardware and software sharing is possible for these systems. An attempt has also been made to map the functional reconfigurable transceiver onto the proposed hardware platform. The different functional entities which will be required to perform the reconfiguration and realize the transceiver are explained.
منابع مشابه
An Overview of Reconfigurable Hardware for Efficient Implementation of DSP Algorithms
Reconfigurable hardware is emerging as the best option for the efficient implementation of complex and computationally expensive signal processing algorithms. Reconfigurable hardware exploits the benefit of high of computational efficiency of hardware as well as flexibility of software implementation. Field Programmable Gate Array (FPGA) which finds wide range of applications in the field of si...
متن کاملReconfigurable mobile communications: compelling needs and technologies to support reconfigurable terminals
To date, research into reconfigurable mobile communications has predominantly focussed on the software radio concept, and specifically on the hardware technologies required to move physical layer processing into a programmable environment [ 1][2][3]. Although an interesting and necessary challenge, this only represents a fraction of the overall support and technology required to realise the pot...
متن کاملFPGA Implementation of JPEG and JPEG2000-Based Dynamic Partial Reconfiguration on SOC for Remote Sensing Satellite On-Board Processing
This paper presents the design procedure and implementation results of a proposed hardware which performs different satellite Image compressions using FPGA Xilinx board. First, the method is described and then VHDL code is written and synthesized by ISE software of Xilinx Company. The results show that it is easy and useful to design, develop and implement the hardware image compressor using ne...
متن کاملArchitectures for Heterogeneous Multi-Tier Networks
Next-generation wireless computing platforms will contain flexible communications capabilites. At Rice University, the Rice Everywhere NEtwork (RENÉ) project is investigating a multi-standard, multi-tier integration of W-CDMA cellular systems, high speed wireless LANs, and home wireless networks. There are many challenges in mapping these advanced communication algorithms to real-time hardware ...
متن کاملA Medium-grain Reconfigurable Cell Array for Dsp
Digital signal processing (DSP) is an essential component of many applications, including multimedia and communications systems. The recent surge in wireless and mobile computing underscores the need for high-performance low power DSP hardware. Reconfigurable hardware balances these requirements with development costs by providing system designers a viable alternative to custom integrated circu...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
- EURASIP J. Wireless Comm. and Networking
دوره 2005 شماره
صفحات -
تاریخ انتشار 2005